RISC Explained – Everything You Need To Know

5 Facts About RISC

  • RISC design philosophy dates back to 1946 with the work of Alan Turing, who is often referred to as the father of modern computer science.
  • Most mainstream modern processor designs are based on RISC architecture. Notable exceptions are the x86 line of processors from Intel and common AMD chips that operate on CISC architecture.
  • The first RISC system was designed for a telephone switch to dramatically enhance call routing speeds.
  • When RISC processors entered the mainstream market in the mid-1980s, they helped bring about a leap in speed for high-end machines and servers.
  • Mainstream chip designs based on RISC architecture include ARM, MIPS, PowerPC and SPARC processors.

RISC History

The idea for the reduced instruction set computer (RISC) architecture has its roots in the work of the inventor, Alan Turing, dating back to 1946 with his paper about a theoretical “Automatic Computing Engine.” Some of the earliest computers in operation in the 1960s exhibited RISC-like qualities in their ability to store and load data. The acronym RISC is also used in the genetics field, but it’s unrelated to the computer acronym.

It is believed by some experts that the first modern RISC system was created by John Cocke. The inventor’s project began in 1975, and it was completed in the form of the IBM 801 processor in 1980. However, the term RISC was coined by David Patterson between 1980 and 1984 as the name of the project that he led at the University of California at Berkeley. Patterson’s philosophy was similar to Cocke’s in that he sought to create a more efficient computer processor architecture.

The goal in creating the IBM 801 RISC system was to produce a 24-bit computer processor that could provide enhanced speed and other advantages for a telephone switching system. For the goal of handling 1 million calls per hour, the RISC system would need to carry out 12 million instructions per second, which was more than triple the speed of IBM’s fastest mainframe system at that time.

RISC: How it Worked

RISC architecture, which stands for reduced instruction set computer, is used to produce microprocessor chips that are optimized to use simpler instructions for more efficient operations and other advantages. With simpler instructions, the processor can execute at higher clock speeds and usually with improved performance. Higher efficiency in microprocessors is important for devices that run on batteries and can’t provide as much electrical power to run a more demanding processor. Devices such as smartphones, laptops and tablets tend to benefit the most from RISC processors.

The microprocessor is the heart of any computerized device, examples of which include smartphones, servers, or professional desktop workstations. The central processing unit (CPU) carries out the operations of a device by doing rapid repetitions of mathematical operations. Modern processors do operations in cycles that occur billions of times per second, which is why the speed of a processor is described in gigahertz, abbreviated GHz.

With RISC architecture, each processing cycle has less work to do because it only executes one action per cycle. By sticking to one cycle per instruction, the total execution time can be reduced for a faster and more efficient overall performance of the system. The fixed length of instructions per cycle also means it’s easier for the system to pipeline the data to and from the processor, and provides other advantages that include faster transfer of data to and from computer memory.

RISC: Historical Significance

The first RISC processors were a major leap forward in computer speed, and their early designs led to several state-of-the-art processors that soon followed. The first creators of RISC systems found that there were performance limitations in the processors of that time, mostly due to complex microcode sequences that placed more demands on code execution.

Engineers that developed the first RISC chips, notably David Patterson of UC Berkeley and John Cocke of IBM, realized that the microcode sequences needed to be removed before significant leaps in performance could be achieved. Not only was the chip architecture overly complicated, but programming code suffered as a result. Patterson had been recruited to improve the Motorola 68K processor, which was an example of the design philosophy of the time that pushed for greater complexity. Consequently, Patterson began a project at Berkeley to radically change chip architecture for smaller instruction sets and greater efficiency.

When the RISC project became known in the computer science field, engineers at Stanford University began a similar effort in 1981 called the MIPS project. The Stanford project started as a graduate project, and a functioning MIPS system came into being in 1983. In 1984, John Hennesy and his team formed a company called MIPS Computer Systems.

By the middle of the 1980s, RISC systems began to be seen as commercially viable. MIPS Computer Systems released the R2000 processor in 1986, which was a 32-bit system based on RISC architecture. Soon afterward, Hewlett Packard released the PA-RISC, and SUN Microsystems developed the SPARC processor, which was derived from the work of the Berkeley RISC team.

In the late 1980s, RISC processors were far outperforming competing chip types. Some notable examples were the Intel i860 and the Motorola PowerPC chips. IBM became interested in SPARC systems, which led to these processors becoming the most prevalent chips to power servers in the mid-1990s.

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